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Apple is developing AI servers built around its own M8 Ultra chips, in
tw=
o- and four-chip configurations, and evaluating Nvidia's NVLink
Fusion= =C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80= =8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0= =E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2= =A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C= =C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80= =8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2= =A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C= =C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80= =8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0= =E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2= =A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C=C2=A0=E2=80=8C= =C2=A0
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=09=09TLDR=
=20
TLDR HARDWARE 2026-09-21
=F0=9F=93=B1=20
HEADLINES AND LAUNC=
HES
APPLE REPORTEDLY EYES NVIDIA'S NVLINK FUSION TO CONNECT ITS OWN M=
8
ULTRA AI SERVERS BY 2029 (5 MINUTE READ) [4]=20
Apple is developing=
AI servers built around its own M8 Ultra chips,
in two- and four-chip co=
nfigurations, and evaluating Nvidia's NVLink
Fusion, the interconnect pro=
tocol, switches, chiplets, and software
stack Nvidia uses to bind racks o=
f GPUs into one tightly coupled
compute domain, since Apple's own UltraFu=
sion tech stitches two chips
together but has no answer for the larger-sc=
ale connectivity these
servers would need.=20
CRUSOE RAISES $3.9B TO =
BUILD MASSIVE DATA CENTERS AND
TRUCK-TRANSPORTABLE MODULAR "SPARK" AI FAC=
TORIES (3 MINUTE READ) [5]=20
Crusoe raised a $3.9 billion Series F, pu=
shing its valuation to $30.9
billion, with the capital funding both large=
-scale sites like its
Abilene, Texas data center used by OpenAI, and Spar=
k, a line of
smaller modular data centers Crusoe manufactures at its own =
facilities
so they can be transported by truck and connected to power alm=
ost
anywhere. Building these in-house lets Crusoe deploy compute fast
w=
ithout needing a large on-site construction workforce, and the
smaller fo=
otprint helps sidestep some of the local community backlash
that larger d=
ata center complexes increasingly draw.=20
=F0=9F=94=A8=20
ENGINEERIN=
G AND APPLICATIONS
CHINA BUILDS EARLY SUB-3NM GAA TRANSISTORS USING O=
LDER DUV
LITHOGRAPHY, SIDESTEPPING EUV RESTRICTIONS (4 MINUTE READ) [6] =
Chinese Academy of Sciences researchers have completed early
integ=
ration of stacked nanosheet-channel gate-all-around (GAA) CMOS
transistor=
s, the architecture already used by Samsung and TSMC at 3nm
and below, us=
ing deep ultraviolet (DUV) lithography instead of the EUV
machines ASML i=
s barred from selling to China. GAA wraps the gate
fully around the chann=
el rather than surrounding it on three sides
like FinFET, giving tighter =
control over current flow. Researcher Ye
Tianchun frames the work as an e=
arly process route toward sub-3nm
devices rather than a demonstrated prod=
uction capability.=20
=F0=9F=A7=A0=20
RESEARCH AND PROTOTYPES
N=
C STATE'S NEW THIN FILM IS 10,000X STIFFER THAN SILICONE, YET
INSULATES 5=
X BETTER (4 MINUTE READ) [7]=20
Material science has long treated stiff=
ness and heat insulation as a
trade-off: stiff materials like metal condu=
ct heat fast, while soft
ones like rubber trap it. NC State researchers b=
roke that link with a
non-porous thin film built from 2D hybrid organic-i=
norganic
perovskites, arranging alternating organic and inorganic layers =
into
precise crystalline structures and swapping standard carbon chains f=
or
custom-tailored benzene rings to trap heat vibrations without
sacrif=
icing structural rigidity.=20
UCLA-PIONEERED NANOWIRE NETWORKS PHYSICAL=
LY REWIRE THEMSELVES TO
COMPUTE, NO SOFTWARE NEURAL NETWORK REQUIRED (4 M=
INUTE READ) [8]=20
A new paper in Nature Reviews Physics covers self-or=
ganizing nanowire
and nanoparticle networks, first built at UCLA in 2011,=
where the
material's physical structure acts as the neural network inste=
ad of
running one in software on a chip. Individual nanowires act like
=
neurons, and the connections between them act like synapses, growing
stro=
nger with repeated use and fading without it, similar to memory
and forge=
tting in the brain, so the hardware itself learns rather than
just runnin=
g a fixed program.=20
=F0=9F=8E=81=20
MISCELLANEOUS
DANIEL LEMI=
RE BREAKS DOWN HOW APPLE SILICON GOT 52% FASTER IN THREE
YEARS, MOSTLY FR=
OM CLOCK SPEED (4 MINUTE READ) [9]=20
Comparing base M2 (2022) through =
M5 (2025) on Geekbench 6,
single-core performance rose 52% and multi-core=
83%, with most of the
single-core gain traced to raw clock speed: the P-=
core climbed from
3.5GHz to 4.6GHz, a 30% jump that alone explains the bu=
lk of it.
Transistor count grew roughly 40% from M2 to M4 (20 billion to =
28
billion), spent partly on two extra efficiency cores on the M4 that
=
boost multicore throughput without touching single-core speed, and
partly=
on wider decode, up from 8 to 10 instructions per cycle, ahead
of most c=
ompetitors.=20
CEREBRAS CEO ANDREW FELDMAN ON THE "DINNER PLATE" CHIP, =
AND WHY AI
INFERENCE TODAY IS "UTTERLY IDIOTIC" (6 MINUTE READ) [10]=20
=
At a Google Bay View event, Cerebras co-founder Andrew Feldman,
semic=
onductor veteran Atiq Raza, and investor Dave Blundin discussed
where AI =
hardware is actually bottlenecked. Feldman brought Cerebras's
WSE-3 "dinn=
er plate" chip, a 9-inch wafer-scale part with 4 trillion
transistors acr=
oss 900,000 cores, now carrying a $25 billion backlog
with plans to scale=
production 8x this year and again next year, and
named data center avail=
ability, not compute itself, as the industry's
current binding constraint=
, predicting fab capacity becomes the next
bottleneck within three years.=
=20
=E2=9A=A1=20
QUICK LINKS
NORTHROP GRUMMAN WINS GHOST-R SPY =
SATELLITE PROTOTYPE DEAL (3 MINUTE
READ) [11]=20
Northrop Grumman won=
a Space Force/DIU contract to build a GHOST-R
prototype satellite, using=
its compact suitcase-sized ESPASat-L
platform with a TRL-11 optical payl=
oad, to deliver low-cost,
high-resolution surveillance of objects in geos=
ynchronous orbit within
an accelerated 24-month timeline.=20
JOBY'S A=
UTONOMY STACK FLIES A CONVERTED CESSNA 3,100 MILES ACROSS THE
US, NO PILO=
T IN CONTROL (3 MINUTE READ) [12]=20
Joby Aviation flew a converted Ces=
sna Caravan more than 3,100 miles
across the US with autonomous taxiing, =
takeoff, navigation, and
landing throughout, remotely supervised from Job=
y's California
headquarters and Shaw Air Force Base, with a pilot onboard=
only for
compliance.=20
US AWARDS ANDERON $1B TO BUILD DEDICATED QUA=
NTUM WAFER MANUFACTURING
(3 MINUTE READ) [13]=20
Anderon, IBM's Alban=
y-based quantum chip foundry spinout, secured a
$1 billion CHIPS Act awar=
d to scale up US production of 300mm quantum
wafers.=20
LATTICE LAUNC=
HES MACH-N2, AN FPGA BUILT FOR THE POST-QUANTUM SECURITY
ERA (4 MINUTE RE=
AD) [14]=20
Lattice Semiconductor unveiled Mach-N2, an FPGA that beats =
rivals AMD
Xilinx and Altera to market with post-quantum cryptography (PQ=
C) baked
in.=20
NEXPERIA WILL MAKE CHIPS IN INDIA WITH TATA AS IT SPL=
ITS FROM
WINGTECH (3 MINUTE READ) [15]=20
Nexperia will have Tata mak=
e and package chips in India, expanding
its manufacturing options as it s=
eparates from Chinese parent
Wingtech.=20
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Thanks for reading,=20
Kshitij Sudan [20] & Adi Ni=
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<div style=3D"display: none; max-height: 0px; overflow: hidden;">Apple is d= eveloping AI servers built around its own M8 Ultra chips, in two- and four-= chip configurations, and evaluating Nvidia's NVLink Fusion =E2=80= =8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80= =8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80= =8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80= =8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80= =8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80= =8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C = =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C = =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C = =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C = =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C =E2=80=8C = =E2=80=8C =E2=80=8C </div>
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<div style=3D"text-align: center;">
<h1><strong>TLDR Hardware <span id=3D"date">2026-09-21</span></strong></h1> </div>
</td></tr></tbody></table>
<table style=3D"table-layout: fixed; width:100%;" width=3D"100%"><tbody></t= body></table>
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<table align=3D"center" bgcolor=3D"" border=3D"0" cellpadding=3D"0" cellspa= cing=3D"0" width=3D"100%"><tbody><tr><td class=3D"container" style=3D"paddi= ng-top: 0px; padding-bottom: 0px;">
<div class=3D"text-block">
<div style=3D"text-align: center;"><span style=3D"font-size: 36px;">=F0=9F= =93=B1</span></div></div>
</td></tr></tbody></table>
<table align=3D"center" bgcolor=3D"" border=3D"0" cellpadding=3D"0" cellspa= cing=3D"0" width=3D"100%"><tbody><tr><td class=3D"container" style=3D"paddi= ng-top: 0px; padding-bottom: 0px;">
<div class=3D"text-block">
<div style=3D"text-align: center;">
<h1><strong>Headlines and Launches</strong></h1>
</div>
</div>
</td></tr></tbody></table>
<table style=3D"table-layout: fixed; width: 100%;" width=3D"100%"><tbody><t= r><td style=3D"padding:0;border-collapse:collapse;border-spacing:0;margin:0=
;" valign=3D"top">
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Fwww.tomshardware.com%2Ftech-industry%2Fartificial-intel= ligence%2Fapple-eyes-nvidia-nvlink-to-power-its-new-custom-m8-ultra-ai-serv= ers-historically-bitter-rivals-reportedly-team-up-for-2029-data-center-push= %3Futm_source=3Dtldrhardware/1/010001a0c420addc-c1651748-7145-4861-9442-9a4= 827d2011e-000000/1glDOH_CIo2j5cjF7UnA3rMHJZIyER5T8zNV9FYCxA0=3D452">
<span>
<strong>Apple reportedly eyes Nvidi= a's NVLink Fusion to connect its own M8 Ultra AI servers by 2029 (5 minute = read)</strong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
Apple is developing AI servers built ar= ound its own M8 Ultra chips, in two- and four-chip configurations, and eval= uating Nvidia's NVLink Fusion, the interconnect protocol, switches, chiplet=
s, and software stack Nvidia uses to bind racks of GPUs into one tightly co= upled compute domain, since Apple's own UltraFusion tech stitches two chips=
together but has no answer for the larger-scale connectivity these servers=
would need.
</span>
</span>
</div>
</td></tr></tbody></table>
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Ftechcrunch.com%2F2026%2F09%2F17%2Fcrusoe-raises-3-9b-to= -build-massive-data-centers-and-small-modular-ai-factories%2F%3Futm_source= =3Dtldrhardware/1/010001a0c420addc-c1651748-7145-4861-9442-9a4827d2011e-000= 000/SlCmFNpYKelYOol1Go5g_T-258wxqkgyI3P41qkUcr0=3D452">
<span>
<strong>Crusoe raises $3.9B to buil=
d massive data centers and truck-transportable modular "Spark" AI factories=
(3 minute read)</strong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
Crusoe raised a $3.9 billion Series F, = pushing its valuation to $30.9 billion, with the capital funding both large= -scale sites like its Abilene, Texas data center used by OpenAI, and Spark,=
a line of smaller modular data centers Crusoe manufactures at its own faci= lities so they can be transported by truck and connected to power almost an= ywhere. Building these in-house lets Crusoe deploy compute fast without nee= ding a large on-site construction workforce, and the smaller footprint help=
s sidestep some of the local community backlash that larger data center com= plexes increasingly draw.
</span>
</span>
</div>
</td></tr></tbody></table>
</td></tr></tbody></table>
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<div class=3D"text-block">
<div style=3D"text-align: center;"><span style=3D"font-size: 36px;">=F0=9F= =94=A8</span></div>
</div>
</td></tr></tbody></table>
<table align=3D"center" bgcolor=3D"" border=3D"0" cellpadding=3D"0" cellspa= cing=3D"0" width=3D"100%"><tbody><tr><td class=3D"container" style=3D"paddi= ng-top: 0px; padding-bottom: 0px;">
<div class=3D"text-block">
<div style=3D"text-align: center;">
<h1><strong>Engineering and Applications</strong></h1>
</div>
</div>
</td></tr></tbody></table>
<table style=3D"table-layout: fixed; width: 100%;" width=3D"100%"><tbody><t= r><td style=3D"padding:0;border-collapse:collapse;border-spacing:0;margin:0=
;" valign=3D"top">
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Finterestingengineering.com%2Finnovation%2Fchina-older-c= hipmaking-technology-smaller-chips%3Futm_source=3Dtldrhardware/1/010001a0c4= 20addc-c1651748-7145-4861-9442-9a4827d2011e-000000/bl4kroClFI-Myz2IDjAJmIRZ= HI4KFhAoQZVbFXDXbJ0=3D452">
<span>
<strong>China builds early sub-3nm = GAA transistors using older DUV lithography, sidestepping EUV restrictions =
(4 minute read)</strong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
Chinese Academy of Sciences researchers=
have completed early integration of stacked nanosheet-channel gate-all-aro= und (GAA) CMOS transistors, the architecture already used by Samsung and TS=
MC at 3nm and below, using deep ultraviolet (DUV) lithography instead of th=
e EUV machines ASML is barred from selling to China. GAA wraps the gate ful=
ly around the channel rather than surrounding it on three sides like FinFET=
, giving tighter control over current flow. Researcher Ye Tianchun frames t=
he work as an early process route toward sub-3nm devices rather than a demo= nstrated production capability.
</span>
</span>
</div>
</td></tr></tbody></table>
</td></tr></tbody></table>
<table align=3D"center" bgcolor=3D"" border=3D"0" cellpadding=3D"0" cellspa= cing=3D"0" width=3D"100%"><tbody><tr><td class=3D"container" style=3D"paddi= ng-top: 0px; padding-bottom: 0px;">
<div class=3D"text-block">
<div style=3D"text-align: center;"><span style=3D"font-size: 36px;">=F0=9F= =A7=A0</span></div>
</div>
</td></tr></tbody></table>
<table align=3D"center" bgcolor=3D"" border=3D"0" cellpadding=3D"0" cellspa= cing=3D"0" width=3D"100%"><tbody><tr><td class=3D"container" style=3D"paddi= ng-top: 0px; padding-bottom: 0px;">
<div class=3D"text-block">
<div style=3D"text-align: center;">
<h1><strong>Research and Prototypes</strong></h1>
</div>
</div>
</td></tr></tbody></table>
<table style=3D"table-layout: fixed; width: 100%;" width=3D"100%"><tbody><t= r><td style=3D"padding:0;border-collapse:collapse;border-spacing:0;margin:0=
;" valign=3D"top">
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Ftech.yahoo.com%2Fscience%2Farticles%2Fmaterial-conducts= -5-times-less-175712237.html%3Futm_source=3Dtldrhardware/1/010001a0c420addc= -c1651748-7145-4861-9442-9a4827d2011e-000000/NCDmZn-N4IKyo3OCNpCsUCoEukf8dm= wELHROrpecwto=3D452">
<span>
<strong>NC State's new thin film is=
10,000x stiffer than silicone, yet insulates 5x better (4 minute read)</st= rong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
Material science has long treated stiff= ness and heat insulation as a trade-off: stiff materials like metal conduct=
heat fast, while soft ones like rubber trap it. NC State researchers broke=
that link with a non-porous thin film built from 2D hybrid organic-inorgan=
ic perovskites, arranging alternating organic and inorganic layers into pre= cise crystalline structures and swapping standard carbon chains for custom-= tailored benzene rings to trap heat vibrations without sacrificing structur=
al rigidity.
</span>
</span>
</div>
</td></tr></tbody></table>
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Fnewsroom.ucla.edu%2Freleases%2Ftoward-physical-ai-when-= hardware-becomes-neural-network%3Futm_source=3Dtldrhardware/1/010001a0c420a= ddc-c1651748-7145-4861-9442-9a4827d2011e-000000/pFeSer407oe4Rz0ewjKwCOnm2Kp= 6GiThehddifGh7eo=3D452">
<span>
<strong>UCLA-pioneered nanowire net= works physically rewire themselves to compute, no software neural network r= equired (4 minute read)</strong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
A new paper in Nature Reviews Physics c= overs self-organizing nanowire and nanoparticle networks, first built at UC=
LA in 2011, where the material's physical structure acts as the neural netw= ork instead of running one in software on a chip. Individual nanowires act = like neurons, and the connections between them act like synapses, growing s= tronger with repeated use and fading without it, similar to memory and forg= etting in the brain, so the hardware itself learns rather than just running=
a fixed program.
</span>
</span>
</div>
</td></tr></tbody></table>
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<div class=3D"text-block">
<div style=3D"text-align: center;"><span style=3D"font-size: 36px;">=F0=9F= =8E=81</span></div></div>
</td></tr></tbody></table>
<table align=3D"center" bgcolor=3D"" border=3D"0" cellpadding=3D"0" cellspa= cing=3D"0" width=3D"100%"><tbody><tr><td class=3D"container" style=3D"paddi= ng-top: 0px; padding-bottom: 0px;">
<div class=3D"text-block">
<div style=3D"text-align: center;"><strong><h1>Miscellaneous</h1></strong><= /div>
</div>
</td></tr></tbody></table>
<table bgcolor=3D"" style=3D"table-layout: fixed; width: 100%;" width=3D"10= 0%"><tbody><tr><td style=3D"padding:0;border-collapse:collapse;border-spaci= ng:0;margin:0;" valign=3D"top">
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Flemire.me%2Fblog%2F2026%2F09%2F19%2Fhow-did-apple-silic= on-get-50-faster-in-three-years%2F%3Futm_source=3Dtldrhardware/1/010001a0c4= 20addc-c1651748-7145-4861-9442-9a4827d2011e-000000/gYLVe0UPHZW7xQXi0zqB3_FQ= 0ZfJ02gZbhStoUbhBQM=3D452">
<span>
<strong>Daniel Lemire breaks down h=
ow Apple Silicon got 52% faster in three years, mostly from clock speed (4 = minute read)</strong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
Comparing base M2 (2022) through M5 (20= 25) on Geekbench 6, single-core performance rose 52% and multi-core 83%, wi=
th most of the single-core gain traced to raw clock speed: the P-core climb=
ed from 3.5GHz to 4.6GHz, a 30% jump that alone explains the bulk of it. Tr= ansistor count grew roughly 40% from M2 to M4 (20 billion to 28 billion), s= pent partly on two extra efficiency cores on the M4 that boost multicore th= roughput without touching single-core speed, and partly on wider decode, up=
from 8 to 10 instructions per cycle, ahead of most competitors.
</span>
</span>
</div>
</td></tr></tbody></table>
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Flinks.tldrnewsletter.com%2FlWtDmY/1/010001a0c420addc-c1= 651748-7145-4861-9442-9a4827d2011e-000000/Dfx3lJth_lP3-mXB1G-7bffQ2fhbiYd-8= gdOJ7gpX9Q=3D452">
<span>
<strong>Cerebras CEO Andrew Feldman=
on the "dinner plate" chip, and why AI inference today is "utterly idiotic=
" (6 minute read)</strong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
At a Google Bay View event, Cerebras co= -founder Andrew Feldman, semiconductor veteran Atiq Raza, and investor Dave=
Blundin discussed where AI hardware is actually bottlenecked. Feldman brou= ght Cerebras's WSE-3 "dinner plate" chip, a 9-inch wafer-scale part with 4 = trillion transistors across 900,000 cores, now carrying a $25 billion backl=
og with plans to scale production 8x this year and again next year, and nam=
ed data center availability, not compute itself, as the industry's current = binding constraint, predicting fab capacity becomes the next bottleneck wit= hin three years.
</span>
</span>
</div>
</td></tr></tbody></table>
</td></tr></tbody></table>
<table align=3D"center" bgcolor=3D"" border=3D"0" cellpadding=3D"0" cellspa= cing=3D"0" width=3D"100%"><tbody><tr><td class=3D"container" style=3D"paddi= ng-top: 0px; padding-bottom: 0px;">
<div class=3D"text-block">
<div style=3D"text-align: center;"><span style=3D"font-size: 36px;">=E2=9A= =A1</span></div></div>
</td></tr></tbody></table>
<table align=3D"center" bgcolor=3D"" border=3D"0" cellpadding=3D"0" cellspa= cing=3D"0" width=3D"100%"><tbody><tr><td class=3D"container" style=3D"paddi= ng-top: 0px; padding-bottom: 0px;">
<div class=3D"text-block">
<div style=3D"text-align: center;">
<h1><strong>Quick Links</strong></h1>
</div>
</div>
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<table bgcolor=3D"" style=3D"table-layout: fixed; width: 100%;" width=3D"10= 0%"><tbody><tr><td style=3D"padding:0;border-collapse:collapse;border-spaci= ng:0;margin:0;" valign=3D"top">
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Finterestingengineering.com%2Fspace%2Fus-ghost-r-spy-sat= ellite-prototyp%3Futm_source=3Dtldrhardware/1/010001a0c420addc-c1651748-714= 5-4861-9442-9a4827d2011e-000000/iWI94sbuR1p9wD1pw1jEzi7EIIdl7BSeq0XaMsKDOeg= =3D452">
<span>
<strong>Northrop Grumman Wins GHOST=
-R Spy Satellite Prototype Deal (3 minute read)</strong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
Northrop Grumman won a Space Force/DIU = contract to build a GHOST-R prototype satellite, using its compact suitcase= -sized ESPASat-L platform with a TRL-11 optical payload, to deliver low-cos=
t, high-resolution surveillance of objects in geosynchronous orbit within a=
n accelerated 24-month timeline.
</span>
</span>
</div>
</td></tr></tbody></table>
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Ftechcrunch.com%2F2026%2F09%2F18%2Fjoby-aviations-3100-m= ile-autonomous-flight-signals-its-push-beyond-electric-air-taxis%2F%3Futm_s= ource=3Dtldrhardware/1/010001a0c420addc-c1651748-7145-4861-9442-9a4827d2011= e-000000/oalQA1KLtW1wf_gYY8rMspVNdnuHHsfv-KDBZWzm1EQ=3D452">
<span>
<strong>Joby's autonomy stack flies=
a converted Cessna 3,100 miles across the US, no pilot in control (3 minut=
e read)</strong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
Joby Aviation flew a converted Cessna C= aravan more than 3,100 miles across the US with autonomous taxiing, takeoff=
, navigation, and landing throughout, remotely supervised from Joby's Calif= ornia headquarters and Shaw Air Force Base, with a pilot onboard only for c= ompliance.
</span>
</span>
</div>
</td></tr></tbody></table>
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Fwww.eetimes.com%2Fu-s-awards-anderon-1b-for-quantum-waf= er-manufacturing%3Futm_source=3Dtldrhardware/1/010001a0c420addc-c1651748-71= 45-4861-9442-9a4827d2011e-000000/5HJ6zvA-MjEkyOefB9AbsUgOLDYrcWPU7nm8Blx4l1= s=3D452">
<span>
<strong>US awards Anderon $1B to bu= ild dedicated quantum wafer manufacturing (3 minute read)</strong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
Anderon, IBM's Albany-based quantum chi=
p foundry spinout, secured a $1 billion CHIPS Act award to scale up US prod= uction of 300mm quantum wafers.
</span>
</span>
</div>
</td></tr></tbody></table>
<table align=3D"center" border=3D"0" cellpadding=3D"0" cellspacing=3D"0" wi= dth=3D"100%"><tbody><tr><td class=3D"container" style=3D"padding: 15px 15px=
<div class=3D"text-block">
<span>
<a href=3D"
https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Fwww.thelec.net%2Fnews%2FarticleView.html%3Fidxno=3D1400= 7%26utm_source=3Dtldrhardware/1/010001a0c420addc-c1651748-7145-4861-9442-9a= 4827d2011e-000000/jGQWFpfbJXkQ6SRcDHTx92veRBk4i4yG7_aQwmRPaWA=3D452">
<span>
<strong>Lattice launches Mach-N2, a=
n FPGA built for the post-quantum security era (4 minute read)</strong>
</span>
<span style=3D"font-family: "Helvetica Neue", Helvetica, Arial, V= erdana, sans-serif;">
Lattice Semiconductor unveiled Mach-N2,=
an FPGA that beats rivals AMD Xilinx and Altera to market with post-quantu=
m cryptography (PQC) baked in.
</span>
</span>
</div>
</td></tr></tbody></table>
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https://tracking.tldrnewsletter.= com/CL0/https:%2F%2Fthenextweb.com%2Fnews%2Fnexperia-tata-electronics-chip-= manufacturing-india%3Futm_source=3Dtldrhardware/1/010001a0c420addc-c1651748= -7145-4861-9442-9a4827d2011e-000000/E5JZ6mQ3wvIQWRRHA8OxQt3pxeFhRgdUoqwORxR= J4oE=3D452">
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